#ifndef _DRV_H
#define _DRV_H
/*
  author Sylvain Bertrand <digital.ragnarok@gmail.com>
  Protected by GNU Affero GPL v3 with some exceptions.
  See README at root of alga tree.
*/

enum family {
	CEDAR,
	REDWOOD,
	JUNIPER,
	CYPRESS,
	HEMLOCK
};

#define ERR -900

#define GPU_PAGE_SZ			4096
#define GPU_PAGE_LOG2_QWS		9
#define GPU_PAGE_MASK(gpu_addr)		((gpu_addr) & 0xfffffffffffff000)
#define GPU_PAGE_IDX(addr)		((addr) >> 12)
#define IS_GPU_PAGE_ALIGNED(addr)	(!((addr) & 0xfff))

struct vram {
	void __iomem *bar0;
	struct rng mng;
	u64 scratch_page;
};

struct cfg {
	u32 addr_best;
	unsigned dce_crtcs_n;
	unsigned gpu_hw_ctxs_n_max;
	unsigned gpu_ses_n;
	unsigned gpu_rbs_n_max;
	unsigned gpu_sx_sets_n;
	unsigned gpu_sx_export_sz_max;
	unsigned gpu_sx_export_pos_sz_max;
	unsigned gpu_sx_export_smx_sz_max;
	unsigned gpu_sc_prim_fifo_sz;
	unsigned gpu_sc_hiz_tile_fifo_sz;
	unsigned gpu_sc_earlyz_tile_fifo_sz;
};

struct dev_drv_data {
	struct hlist_node node;

	enum family family;
	struct cfg cfg;

	struct atombios *atb;

	struct dce4 *dce;

	void __iomem *regs;
	size_t regs_sz;
	struct vram vram;
	struct ba ba;
	struct ucode ucode;
	struct cp cp0;
	struct ih ih;

	/* userland */
	struct cdev evergreen_cdev;
	struct device *evergreen_dev;
	struct pci_dev *dev;
};

u32 rr32(struct pci_dev *dev, unsigned offset);
void wr32(struct pci_dev *dev, u32 val, unsigned offset);
#endif /* _DRV_H */
